This invention lies in the field of comparison of electronic or other types of signals. More specifically, this invention relates to electronic comparator circuits for high speed applications.
Typically, comparators have a positive (also called non-inverting) input and a negative (also called inverting) input for receiving the input voltages or currents, and an output voltage or current which indicates a high level if the positive input is greater than the negative input, and indicates a low level if the negative input is larger than the positive input. Some comparators also have an additional complimentary output.
Comparators find themselves as important components in many applications, including medium resolution (8-10 bits) Analog to Digital (A/D) converters, memory circuits such as Dynamic Random Access Memory (DRAM) and Static RAM, and Sigma-Delta A/D converters. In modern embedded circuit applications, such as the digital camera, reducing the physical size and the power consumption of fast comparators is of paramount importance due to the large number of comparators used. For example, circuits such as the DRAM, SRAM, and the CMOS imaging array may require one or two comparator circuits for each column. Thus, a typical 1024 by 1024 CMOS image array can require over two thousand comparator circuits for sensing the analog signal levels generated by the array. A reduction in size of the comparator will therefore reduce manufacturing costs and yield a more compact final product. Additionally, in a typical CMOS image array, each comparator will be part of an A/D converter for each column and will typically be called on to perform a comparison every 50 nanoseconds. Thus, a faster comparator will improve image resolution by allowing a greater number of image sensor columns to be sensed in a given period of time.
For high speed applications, a circuit known as a regenerative latch (also called a positive feedback latch) may be used to translate a small difference in the input signal levels into much larger output signal levels in a short period of time. Latches work well in implementing logic circuits such as the flip-flop. However, a latch cannot be used by itself as a comparator circuit when the input signal levels to be compared differ by less than the voltage required to toggle the latch. That is because the latch has only two stable states, such that the smallest difference between the two input signal levels will be enough to launch the outputs towards one of the two stable states. Even if the circuit elements in the latch were perfectly matched to yield zero input offset levels, the significant positive feedback in a latch will be enough to uncontrollably amplify the slightest and shortest noise spike at the inputs. To toggle the latch into another state, the difference in input levels must be greater than the latch toggle voltage. In a typical modern latch built using Metal Oxide Semiconductor (MOS) technology, this toggle voltage is approximately 30 mv. Thus, input signal levels differing by less than 30 mv will have no effect on the output of the latch.
One way to retain the fast and reliable switching characteristics of a latch when comparing two signals which differ by less than the toggle voltage is to use an amplifier stage in front of the latch. The input signals are first amplified to a level that is sufficient to overcome the latch toggle voltage. The amplified levels are then fed to the latch which will then be toggled into the correct output state.
The addition of a separate amplifier stage, however, results in more power consumption, requires greater physical area on the integrated circuit die, and will reduce the overall speed of the comparison because of the additional delay introduced by the separate amplifier stage. Therefore, a novel comparator circuit is needed to overcome some or all of these disadvantages.